发明名称 Semiconductor die package including drain clip
摘要 One embodiment of the invention is directed to a semiconductor die package including a semiconductor die comprising a first surface, a second surface, and a vertical power MOSFET having a gate region and a source region at the first surface a drain region at the second surface. A drain clip having a major surface is electrically coupled to the drain region. A gate lead is electrically coupled to the gate region. A source lead is electrically coupled to the source region. A non-conductive molding material encapsulates the semiconductor die. The major surface of the drain clip is exposed through the non-conductive molding material.
申请公布号 US2004063240(A1) 申请公布日期 2004.04.01
申请号 US20020262170 申请日期 2002.09.30
申请人 FAIRCHILD SEMICONDUCTOR CORPORATION 发明人 MADRID RUBEN;QUINONES MARIA CLEMENS Y.
分类号 H01L23/495;(IPC1-7):H01L21/44;H01L21/48;H01L21/50;H01L23/02;H01L23/48;H01L23/52 主分类号 H01L23/495
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