发明名称 APPARATUS FOR ITERATIVE HARD-INPUT FORWARD ERROR CORRECTION DECODING
摘要 An apparatus for iterative hard-decision forward error correction decoding is described. A method comprises a binary receiver to convert an optical signal to an electrical signal, the electrical signal having a set of information symbols and a set of redundancy symbols, the set of redundancy symbols generated by different forward error correction (FEC) encoding schemes, and a first of a plurality of decoders coupled with the binary receiver and the plurality of decoders coupled together, each of the plurality of decoders to decode the set of information symbols with the set of redundancy symbols in accordance with the different FEC encoding schemes.
申请公布号 WO03085841(A3) 申请公布日期 2004.04.01
申请号 WO2003US09476 申请日期 2003.03.27
申请人 INTEL CORPORATION 发明人 KAUSCHKE, MICHAEL;POPPINGA, CARSTEN
分类号 H03M13/29;H03M13/15;H03M13/27;H03M13/37;H04L1/00 主分类号 H03M13/29
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