| 摘要 |
PROBLEM TO BE SOLVED: To provide a loop processing control device with a stack register required for loop processing and reduced in circuit size while maintaining loop processing performance. SOLUTION: When a loop instruction detector 105 detects a loop setting instruction, a relative address of a loop head address to a loop end address, which is limited to m-bit smaller than N-bit of an instruction address fetched from an instruction code, is stored in a highest-order hierarchy 109 of the stack register 103. When a loop end detector 106 detects a loop end, a relative address adder 108 adds an address count value for a program counter 101 and the m-bit relative address stored in the stack register 103 to generate a N-bit loop head address. COPYRIGHT: (C)2004,JPO
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