发明名称 ARITHMETIC DEVICE FOR CONSUMED CURRENT OR POWER CONSUMPTION, AND PROGRAM THEREFOR
摘要 PROBLEM TO BE SOLVED: To compute a consumed current or a power consumption in an integrated circuit in response to a logic condition of one or a plurality of internal signals within the integrated circuit. SOLUTION: This consumed current or power consumption arithmetic device has a condition inputting means 205 for inputting the logic condition of the internal signals within the integrated circuit, a storage means 208 for storing a consumed current data or a power consumption data per one operation estimated for each basic circuit cell within the integrated circuit, simulators 202, 203 for conducting logical simulation by a logic design data for the integrated circuit and a test bench to output the number of operations for the each basic circuit cell within the integrated circuit in response to the logic condition of the internal signals input by the condition inputting means, and an output means 206 for outputting a totalized consumed current or totalized power consumption in response to the number of operations for the each basic circuit cell output from the simulators and the consumed current data or a power consumption data of the each basic circuit cell stored in the storage means. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004094486(A) 申请公布日期 2004.03.25
申请号 JP20020253256 申请日期 2002.08.30
申请人 FUJITSU LTD 发明人 KUROIWA KOICHI;HIKITA MASAHIRO;MURANUSHI MAKOTO
分类号 G06F17/50;H03K19/00;(IPC1-7):G06F17/50 主分类号 G06F17/50
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