A computing unit (42) executes a second computing in the middle of a first computing. At this time, the hardware structure of the computing unit (43) is switched in accordance with a computing which is a target of execution. A controller (46) stores the internal state of the computing unit (42) in a memory (44) when a computing to the second computing. And the controller (46) controls execution of the first computing to be continued by returning the internal state stored in the memory (44) to the computing unit (42), when a computing to be executed by the computing unit (42) returns from the second computing to the first computing.
申请公布号
WO02093404(A3)
申请公布日期
2004.03.25
申请号
WO2002JP04461
申请日期
2002.05.08
申请人
TOKYO ELECTRON DEVICE LIMITED;NISHIHARA, AKINORI;HASEBE, TETSUYA;HAYASHI, HIROAKI;MITA, TAKASHI