发明名称 System and method for bit line sharing
摘要 A system and method is provided for bit line sharing in a memory device. Adjacent memory cells are configured to share a bit line and are accessed with separate word lines as an odd and even plane. Bit line sharing reduces the number of Y-multiplexors and I/O circuitry required by about two-fold, and provides power savings by reducing the number of bit lines pre-charged.
申请公布号 US6711067(B1) 申请公布日期 2004.03.23
申请号 US20020142523 申请日期 2002.05.08
申请人 VIRAGE LOGIC CORPORATION 发明人 KABLANIAN ADAM
分类号 G11C7/12;G11C7/18;(IPC1-7):G11C7/00 主分类号 G11C7/12
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