| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a D type flip-flop and an electronic circuit capable of stopping a clock while keeping a small forming area adopting the static plus dynamic system and having no limit in timing to read data from its output. <P>SOLUTION: The D type flip-flop comprises: a dynamic system mater latch circuit receiving a D signal synchronously with a clock to temporarily latch the signal; and a static system slave latch circuit for statistically latching an output signal of the master latch circuit synchronously with the clock. Further, the D type flip-flop is provided with a short pulse clock circuit the duty factor of which is decided to have a pulse width within a time within which the dynamic system mater latch circuit is discharged. <P>COPYRIGHT: (C)2004,JPO |
