发明名称 |
Performance for ICs with memory cells |
摘要 |
An integrated memory device comprises a multitude of sense amplifiers which output an amplified data signal on a data line. The data line is forced to a precharge potential when idle. A transistor connects the data line to a precharge potential. The memory device avoids the kickback effect during a data read operation.
|
申请公布号 |
US6704232(B1) |
申请公布日期 |
2004.03.09 |
申请号 |
US20020065193 |
申请日期 |
2002.09.25 |
申请人 |
INFINEON TECHNOLOGIES AKTIENGESELLSCHAFT |
发明人 |
JAIN RAJ KUMAR |
分类号 |
G11C7/10;G11C11/405;G11C11/4091;(IPC1-7):G11C7/00 |
主分类号 |
G11C7/10 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|