发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor memory device which can be tested in a simple configuration within a short processing time. SOLUTION: If the potential of a bit line pair is always the same even if the word lines to be activated are switched at the time of readout, the output of a NAND circuit 207 turns to an "L". In the case the potential of the bit line changes even once, the output of the NAND circuit 207 turns to an "H". At the time of writing, the output of the NAND circuit 207 turns to the "L". A SALATOUT="H" is inputted at the time of readout and at the time of writing to the gate of a transistor (TR) 208. A SALATOUT2="H" is inputted at the time of writing to the gate of a TR 209. The potential is changed on the bit line pair according to the output of the NAND circuit 207. This potential change is outputted to the outside at the time of readout and is determined as a test result and the test data are written in a memory cell by using the potential change at the time of writing. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004071119(A) 申请公布日期 2004.03.04
申请号 JP20020232853 申请日期 2002.08.09
申请人 RENESAS TECHNOLOGY CORP 发明人 ITO TAKASHI
分类号 G01R31/28;G11C7/00;G11C11/401;G11C29/02;G11C29/10;G11C29/14;G11C29/34;(IPC1-7):G11C29/00 主分类号 G01R31/28
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