发明名称 CONTROLLING SIGNAL STATES AND LEAKAGE CURRENT DURING A SLEEP MODE
摘要 A circuit includes an input terminal, an output terminal and a latch. The input terminal receives an input signal. The latch is programmable with a value. The latch communicates the input signal to the output terminal in response to the circuit not being in a sleep mode and in response to the circuit being in the sleep mode, furnishes a second signal to the output terminal indicative of the value.
申请公布号 KR20040018478(A) 申请公布日期 2004.03.03
申请号 KR20047000822 申请日期 2004.01.19
申请人 发明人
分类号 G06F1/00;H03K3/037;H03K17/22;H03K19/00;H03K19/0185 主分类号 G06F1/00
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