发明名称 METHOD FOR FORMING DUAL DAMASCENE METAL LINE OF SEMICONDUCTOR DEVICE USING SACRIFICIAL FILLING MATERIAL
摘要 PURPOSE: A method for forming a dual damascene metal line of a semiconductor device using sacrificial filling material is provided to prevent pattern failure by forming an etching buffer layer at both sidewalls of a trench and sequentially removing a sacrificial filling layer. CONSTITUTION: An interlayer dielectric(331,333) and a polishing buffer layer(340) are sequentially formed at the upper portion of a semiconductor substrate(300). A via hole is formed by selectively etching the interlayer dielectric and the polishing buffer layer. A sacrificial filling layer(370) is formed on the polishing buffer layer for filling the via hole. A trench(365) is formed by selectively etching the sacrificial filling layer, the polishing buffer layer, and the interlayer dielectric for completing a dual damascene pattern. An etching buffer layer(385) is formed at both sidewalls of the trench. Then, the residue of sacrificial filling layer is removed. A metal line is formed at the inner portion of the dual damascene pattern.
申请公布号 KR20040017475(A) 申请公布日期 2004.02.27
申请号 KR20020049547 申请日期 2002.08.21
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 JUNG, JIN SEONG
分类号 H01L21/28;H01L21/768;(IPC1-7):H01L21/28 主分类号 H01L21/28
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