发明名称 PACKAGE STRUCTURE OF SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a package structure of a semiconductor device and its manufacturing method capable of simply manufacturing a package as well as reducing disconnection of a wiring. SOLUTION: The package structure of the semiconductor device comprises a semiconductor chip 1 having a semiconductor element and an electrode pad 2, and a protection layer 3 having a wiring 5 structuring an electric circuit on one surface and a plurality of interlayer connection bodies 4 penetrated from the specific position to the other surface. The protection layers 3 are laminated on the semiconductor chip 1 to cover an electrode pad 2, a top of the interlayer connection body 4 is connected to the electrode pad 2, and the wiring 5 is arranged on a surface opposite to a surface covering the electrode pad 2 of the protection layer 3. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004063808(A) 申请公布日期 2004.02.26
申请号 JP20020220470 申请日期 2002.07.29
申请人 MATSUSHITA ELECTRIC WORKS LTD 发明人 UEDA MICHIHIKO
分类号 H01L23/12;(IPC1-7):H01L23/12 主分类号 H01L23/12
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