发明名称 A RECONFIGURABLE INTEGRATED CIRCUIT WITH A SCALABLE ARCHITECTURE
摘要 An integrated circuit (IC) includes a number of function blocks (FB), of which at least one is re-configurable. Each of the FBs may be a reconfigurable function or a non-reconfigurable function or recursively expanded with additional "nested" function blocks. The IC further includes a number of input pins, a number of output pins, and a number of crossbar devices. The elements, at least at the IC level, are coupled in a manner such that all input signals are provided to the FBs through a first subset of the crossbar devices, all internal signals are routed from one FB to another FB through a second subset of crossbar devices, and all output signals are routed from the FBs to the output pins through a third subset of crossbar devices. To increase routability and speed each of the crossbar device output has a single fanout. Additionally, each of the crossbar devices may provide only one input to each other crossbar device.
申请公布号 WO03032492(A3) 申请公布日期 2004.02.26
申请号 WO2002EP11075 申请日期 2002.10.02
申请人 M2000 发明人 REBLEWSKI, FREDERIC;LEPAPE, OLIVIER
分类号 H01L21/82;G06F15/78;H03K19/0175;H03K19/177;H04Q3/68 主分类号 H01L21/82
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