发明名称 PULL-UP TRANSISTOR ARRAY OF HIGH VOLTAGE OUTPUT CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a pull-up transistor array of a high-voltage output circuit. SOLUTION: In the transistor array, an epitaxial layer is formed on a semiconductor substrate, and n double diffusion DMOS transistors (Trs) are horizontally arranged on the epitaxial layer. One of the source/drain of each of the above-mentioned double diffusion type transistors is individually formed in each transistor, and the n double diffusion type transistors share the other source/drain. Thus, this pull-up transistor array can output a signal of high voltage and high current, an element isolation region is not required between the double diffusion transistors, and therefore an element can be integrated highly. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004064090(A) 申请公布日期 2004.02.26
申请号 JP20030279331 申请日期 2003.07.24
申请人 SAMSUNG ELECTRONICS CO LTD 发明人 HEN ZAINICHI;SON NICHIKEN
分类号 H01L21/8234;H01L27/02;H01L27/088;H01L29/76;H01L29/78;H01L29/94;H01L31/062;H01L31/113;H01L31/119;(IPC1-7):H01L21/823 主分类号 H01L21/8234
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