发明名称 |
Phase control digital frequency divider |
摘要 |
A digital frequency divider includes phase control of the output signal in increments of whole or half cycles of the input frequency. Whole cycle phase control is achieved by varying (logically or physically) the tap off point of a shift register loaded with a bit pattern for appropriate division. Half cycle phase changes are achieved by a multiplexer selecting one of two signals every half cycle.
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申请公布号 |
US6696870(B2) |
申请公布日期 |
2004.02.24 |
申请号 |
US20020104994 |
申请日期 |
2002.03.22 |
申请人 |
STMICROELECTRONICS LIMITED |
发明人 |
DELLOW ANDREW |
分类号 |
H03K23/54;H03K23/68;(IPC1-7):H03K21/00 |
主分类号 |
H03K23/54 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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