| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To enable shortening a test time for word lines and bit lines even in a memory having a large capacity. <P>SOLUTION: This device is provided with sense signal lines 9a, 9b, pre-charge transistors 10a, 10b pre-charging the sense signal lines, discriminating circuits 11a, 11b discriminating the level of the sense signal line, transistors 8a∼8f for sensing, of which the gates are connected to the terminals of word lines 6a to 6f and discharging the sense signal line, respective transistors for sensing connected to adjacent word lines are connected to different sense signal lines. After the sense signal lines 9a, 9b are pre-charged to a high level by the pre-charge transistors 10a, 10b, adjacent word lines are controlled so as to be made simultaneously different levels of "high" and "low" by a word line control decoder 7, existence of defective short circuit between word lines is judged based on output of the discriminating circuits 11a, 11b at the time. <P>COPYRIGHT: (C)2004,JPO</p> |
