发明名称 |
Frame synchronization method and frame synchronization circuit |
摘要 |
A frame synchronization circuit has a frame synchronization pattern detecting circuit for detecting a frame synchronization pattern from received frame data and for outputting a pattern detection signal; a frame synchronization state transition managing circuit for managing state transitions; and a frame timing generation circuit for detecting a transition from a hunting state and for generating an enable signal. The frame synchronization state transition managing circuit manages the number of times a frame synchronization pattern is and is not detected, and makes a transition from the hunting state to a synchronization state if the frame synchronization pattern is detected consecutively for a backward protection stage count, and makes a transition from the synchronization state to the hunting state if the frame synchronization pattern is not detected consecutively for a forward protection stage count.
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申请公布号 |
US6693919(B1) |
申请公布日期 |
2004.02.17 |
申请号 |
US20000563719 |
申请日期 |
2000.05.03 |
申请人 |
NEC ELECTRONICS CORPORATION |
发明人 |
KAMEYAMA CHIHIRO |
分类号 |
H04J3/00;H04J3/06;H04L7/08;H04L12/56;H04Q11/04;(IPC1-7):H04J3/06 |
主分类号 |
H04J3/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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