发明名称 METHOD FOR ACCOMMODATING SMALL MINIMUM DIE IN WIRE BONDED AREA ARRAY PACKAGES
摘要 An area array package comprising a die attach area for attaching a die to a substrate, a network of staggered bond fingers, and a network of bond islands for coupling bond wires between the bond islands and die bond pads is provided. A network of package leads, for example, a network of solder balls in a ball grid array, is depopulated to permit greater trace route flexibility and via placement within the substrate. Stacked die and multi-chip packages are also disclosed. A method for accommodating a high pin-count die in an area array package is also included.
申请公布号 AU2003256826(A1) 申请公布日期 2004.02.16
申请号 AU20030256826 申请日期 2003.07.25
申请人 QUALCOMM INCORPORATED 发明人 MARK VEATCH;TOM GREGORICH;RYAN LANE;EDWARD REYES
分类号 H01L23/498 主分类号 H01L23/498
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