| 摘要 |
Assuming that clocks in an A clock driver (102), a B clock driver (103) and a CMOS buffer circuit (119) have delay values Ta, Tb and Td, respectively, a delay value Ta-Td is stored in a register circuit (117) when terminals "0" of selector circuits (114, 115, 116) are selected, and a delay value Ta-Td-Tb is stored in a register circuit (118) when the terminals "0" are switched to "1". Thus, determining a delay value at the CMOS buffer circuit (119) allows a phase difference between the A clock driver (102) and B clock driver (103) to be determined.
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