| 摘要 |
PURPOSE: A semiconductor memory with a novel geometry of a memory cell array is provided to reduce the number of word lines without reducing the distance between storage capacitors. CONSTITUTION: Storage capacitors(3c) of a memory cells(5a) connected to a single bit line are disposed in an offset manner either all on the right or all on the left of a word line. Consequently, storage capacitors(3a,3b), respectively, that are the most closely adjacent to one another are always connected to two bit lines(1a) that are the most closely adjacent. The grid dimension of a word lines(2) is twice as large as that of the bit lines(1), so that an additional line can in each case be patterned between the word lines in order, for example in the case of very long word lines, to increase the conductivity thereof.
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