发明名称 INSTRUCTION FETCH CONTROL DEVICE
摘要 PROBLEM TO BE SOLVED: To provide an instruction fetch control device efficiently processing a short loop. SOLUTION: This instruction fetch control device uses an instruction buffer mechanism arbitrarily connecting a plurality of instruction buffers to one another and, when a specific instruction buffer stored in a specific instruction buffer is logically same to an instruction stored in another instruction buffer and following to the instruction stored in the specific instruction buffer, this device connects the instruction buffer storing the instruction logically right before the other instruction buffer to the specific instruction buffer without using the instruction of the other instruction buffer, forms the loop between the instruction buffers, and executes the short loop. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004038337(A) 申请公布日期 2004.02.05
申请号 JP20020191432 申请日期 2002.06.28
申请人 FUJITSU LTD 发明人 UKAI MASAKI
分类号 G06F9/38;(IPC1-7):G06F9/38 主分类号 G06F9/38
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