| 摘要 |
A serial digital signal transmission apparatus can transmit HDTV digital serial signals with little jitter while utilizing the SRTS method. In the apparatus, parallel clocks are counted by an N counter to be supplied to the latch circuit, which latches the output count of a p-bit counter, RTSs are supplied from the latch circuit, as the result of comparison gated by a gate circuit is supplied to a PLL circuit and multiplied by N, parallel clocks of 74.25 MHz or {fraction (74.25/1.001 MHz, which are inputs to the N counter are regenerated (N is 8, 15 or 16), and transmitted data undergo parallel-to-serial conversion by a PS converter with these parallel clocks.
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