SYNTHESIZER WITH LOCK DETECTOR, LOCK ALGORITHM, EXTENDED RANGE VCO, AND A SIMPLIFIED DUAL MODULUS DIVIDER,申请号EP20010991237-传众专利搜索

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发明名称	SYNTHESIZER WITH LOCK DETECTOR, LOCK ALGORITHM, EXTENDED RANGE VCO, AND A SIMPLIFIED DUAL MODULUS DIVIDER
摘要
申请公布号	EP1386399(A2)	申请公布日期	2004.02.04
申请号	EP20010991237	申请日期	2001.12.17
申请人	ATHEROS COMMUNICATIONS, INC.	发明人	SU, DAVID, K.;YUE, CHIK, PATRICK;WEBER, DAVID, J.;ZARGARI, MASOUD
分类号	H03L7/089;H03K23/66;H03L7/095;H03L7/099;H03L7/10;H03L7/183;H03L7/193;(IPC1-7):H03L7/095	主分类号	H03L7/089
代理机构		代理人
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