摘要 |
In the microcomputer with a phase-locked loop (PLL) circuit incorporated, a counter is cleared when an edge detection signal of an edge detector which receives an externally generated clock signal from outside and detects an edge of the clock signal, performs a count operation of an internal clock signal output from the PLL circuit as a count source, and output a count value. When the count value of the counter exceeds a predetermined set value, the PLL incorporated microcomputer detects that the externally generated clock signal has been interrupted, and outputs an external clock stop detection signal.
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