| 摘要 |
PROBLEM TO BE SOLVED: To effectively analyze a defective circuit block by map display of failure conditions of wafers and expressing a defective area within a chip with a method of painting the defective area in the chip. SOLUTION: Analysis of the defective circuit block of a random logic product to which the bit map analysis cannot be executed is performed with a testing apparatus of a logic tester 1. Result of determination of defective condition in a unit of the circuit block is provided depending on an analysis software 6 based on the setting of a setting file 7. Namely, as the result of analysis 5, data such as wafer number and chip address information is outputted and such data is expressed as the wafer map format and yield value information in order to identify a defective region. COPYRIGHT: (C)2004,JPO
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