发明名称 FAULT TOLERANT COMPUTER SYSTEM, ITS RECYNCHRONIZATION METHOD, AND RESYNCHRONIZATION PROGRAM
摘要 PURPOSE: To provide a fault tolerant computer system that significantly reduces the suspension period of system operation, and its resynchronization method. CONSTITUTION: The fault tolerant computer system is a lock-step type system having a plurality of computing modules 100, 200, 300 each having processors and memories, with the computing modules processing the same instruction sequence in clock synchronization. When a mismatch in the state of access to an external bus is detected among the processors within each of the computing modules 100, 200, 300 and no fault is detected in the system including the computing modules, interrupts are generated to all the processors to cause each processor to execute instructions for the control of clock synchronization, to thereby adjust the timing of response to access from each computing module and restore the clock synchronization of the computing modules.
申请公布号 KR20040007322(A) 申请公布日期 2004.01.24
申请号 KR20030047086 申请日期 2003.07.11
申请人 NEC CORPORATION 发明人 YAMAZAKI SHIGEO;AINO SHIGEYUKI
分类号 G06F11/16;G06F11/18;G06F13/00;(IPC1-7):G06F11/18 主分类号 G06F11/16
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