| 摘要 |
PROBLEM TO BE SOLVED: To provide a method for controlling a manufacturing process of a semiconductor device by which a failure point can be easily specified and a failure mode of open and short circuits be specified for the layer. SOLUTION: A number of TEG element Trs, having a transistor construction are freely assembled into a wafer, and a multilayer wiring for each of the TEG element Trs is, formed on the wafer 1 by using insulation films 6, 10 and 14, via holes 7, 11 and 15, and wiring patterns 9, 13 and 17, and then a wired element Q1 that is electrically connected with the TEG element Tr through the via hole 15 and a wired element Q2 that is not electrically connected therewith, because of no via hole being mixed in the multilayer. Then, when the TEG element Trs are respectively turned on, the wired elements Q1 and Q2 are checked for continuity by the TEG element Trs. COPYRIGHT: (C)2004,JPO
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