发明名称 FREQUENCY DIVIDER CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a frequency divider circuit for bringing a duty ratio required to produce a phase difference of 90-degrees at high frequency PSK modulation to 50%. SOLUTION: The frequency divider circuit includes: a multiplier circuit one input signal of which is an input clock acting like a reference signal to produce an operation timing of various electronic circuits; a 1/2 frequency divider circuit for receiving an output of the multiplier as a new clock input; and a flip-flop circuit for using an input clock to decide the timing of a data signal being an output of the frequency divider circuit, wherein an output of the flip-flop circuit is given to the multiplier circuit as other input signal and a frequency division signal is obtained from the flip-flop circuit. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004023599(A) 申请公布日期 2004.01.22
申请号 JP20020178102 申请日期 2002.06.19
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 YOKOTA TETSURO
分类号 H03K23/48;H03K23/00;(IPC1-7):H03K23/48 主分类号 H03K23/48
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