发明名称 NON-VOLATILE LATCH CIRCUIT AND SEMICONDUCTOR DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To provide an anti-fuse element and a circuit for realizing functions of writing data to the anti-fuse element and detecting the data using a fewer components than that in prior arts. <P>SOLUTION: When a logical value 1 is written to a nonvolatile latch circuit, a control signal CTL 1 is brought to a low level, a programming control signal PGMA is brought to a high level, and a programming control signal PGMB is brought to a low level, while a control signal CTL2 is set to a high level. A second power supply VDD 2 outputs a programming voltage Vpp to a node Nvs, an output terminal RCB goes to a level Vpp, and the insulation of a transistor 5 with a thin-gate insulation film is destroyed. The signal PGMA is set to a low level, the signal PGMB is set to a high level, and the signals CTL1, CTL2 are set to a low level in the normal operating mode. A normal operating voltage Vop is outputted from a first power supply VDD1 to the node Nvs, an output terminal RC goes to a high level, because the insulation of the transistor 5 is destroyed and the logical value 1 is stored in a non-volatile way. <P>COPYRIGHT: (C)2004,JPO
申请公布号 JP2004022736(A) 申请公布日期 2004.01.22
申请号 JP20020174381 申请日期 2002.06.14
申请人 NEC ELECTRONICS CORP 发明人 TAKAMI SHINYA
分类号 G11C11/413;G11C17/18;G11C29/00;G11C29/04;H01L21/82;H01L21/822;H01L27/04;H01L27/10 主分类号 G11C11/413
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