发明名称 |
Phase splitter circuit with clock duty/skew correction function |
摘要 |
A phase splitter circuit includes a first signal transfer path for receiving an input signal to output a first output signal, a second signal transfer path for receiving the input signal to output a second output signal having an inverted phase of the first output signal, and a duty cycle correction circuit for controlling pull-up and pull-down speeds of the first and second signal transfer paths to the opposite direction in response to the first and second output signals. According to this structure, duty cycles of the first and second output signals approach 50% and a skew or delay time therebetween approaches "0."
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申请公布号 |
US6680637(B2) |
申请公布日期 |
2004.01.20 |
申请号 |
US20020241449 |
申请日期 |
2002.09.12 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
SEO HEE-YOUNG |
分类号 |
H03K5/151;H03K5/156;(IPC1-7):H03K3/017 |
主分类号 |
H03K5/151 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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