发明名称 Distributed read and write caching implementation for optimized input/output applications
摘要 A caching input/output hub includes a host interface to connect with a host. At least one input/output interface is provided to connect with an input/output device. A write cache manages memory writes initiated by the input/output device. At least one read cache, separate from the write cache, provides a low-latency copy of data that is most likely to be used. The at least one read cache is in communication with the write cache. A cache directory is also provided to track cache lines in the write cache and the at least one read cache. The cache directory is in communication with the write cache and the at least one read cache.
申请公布号 US6681292(B2) 申请公布日期 2004.01.20
申请号 US20010940835 申请日期 2001.08.27
申请人 INTEL CORPORATION 发明人 CRETA KENNETH C.;BELL MIKE;GEORGE ROBERT;CONGDON BRADFORD B;BLANKENSHIP ROBERT;JANUARY DUANE
分类号 G06F12/08;G06F13/40;(IPC1-7):G06F13/00 主分类号 G06F12/08
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