| 摘要 |
PURPOSE: A semiconductor memory device having an improved structure to improve an operation speed is provided to accelerate a data input/output rate by making data be inputted/output by being synchronized to the fastest path. CONSTITUTION: According to the semiconductor memory device including a plurality of memory cells arranged in a matrix form along a row and column direction, a plurality of memory array blocks(31,32,33,34,35,36,37,38) include a fixed number of memory cells and are arranged in a row direction. A RAS chain(39) is arranged in a row direction on one side of the plurality of memory array blocks, and selects a word line and enables it. A CAS chain(40) is arranged in a column direction on another side of the plurality of memory array blocks, and amplifies data of N bit from each memory array block and then outputs it to an input/output line. And a data converter(41) outputs data inputted through the input/output line to the memory array block arranged close to the RAS chain by N bit.
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