| 摘要 |
PROBLEM TO BE SOLVED: To provide a timing model that simultaneously takes into consideration timing constraints on a plurality of operating modes of a logic circuit on the basis of an STA script. SOLUTION: This timing model is provided with an STA script inputting part 21 for receiving the STA script with clock information on the logic circuit and path disconnection information showing path disconnection places described therein, a path delay allowance calculating part 22 for extracting paths with no disconnection information about each of a plurality of paths and calculating a delay allowance between cell start and end points of each path, and a CCS (common channel signaling) preparing part 23 for preparing a timing constraint model (CCS) that describes the time constraint of each path and the disconnection information by a plurality of groups which are not contradictory each path and the disconnection information. A CCS connecting means 23b simply connects CCSs 12a and 12b outputted from the CCS preparing part 23 and having their own operating modes to obtain one CCS 12 with a plurality of operating modes taken into consideration. COPYRIGHT: (C)2004,JPO
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