发明名称 DESIGN METHOD FOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a design method for an integrated circuit capable of more optimizing the performance of the integrated circuit. SOLUTION: After an initial layout (S20) is performed, an integrated circuit evaluation step S30, an altered cell selection step S40, and a cell performance alteration step S50 are performed repeatedly. In the altered cell selection step S40, based on the results of the evaluation by the step S30, a cell for altering the performance is selected from the cells forming the integrated circuit. In the cell performance altering step S50, the performance characteristics of the cell selected by the step S40 are determined by referring to a library 15 and using the external conditions thereof. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004005578(A) 申请公布日期 2004.01.08
申请号 JP20030108691 申请日期 2003.04.14
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 TANAKA MASAKAZU;TSUKIYAMA SHUJI;FUKUI MASAHIRO
分类号 G06F17/50;H01L21/82;(IPC1-7):G06F17/50 主分类号 G06F17/50
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