发明名称 METHOD FOR FABRICATING MULTI-LAYERED PCB USING BUMP
摘要 PURPOSE: A method for fabricating a multi-layered PCB using a bump is provided to mount a plurality of electronic components by forming a bump instead of a via hole. CONSTITUTION: A via hole(20) is formed on a first CCL(Copper Clad Laminate)(10) having a first copper foil side(12) which is formed on both sides of a first resin layer(11). A first circuit is formed on the first copper foil side(12) by performing an etching process. A dry film(50) is laminated on both sides of the first CCL(10). An internal layer(100) is fabricated by forming a bump(60). A hole(80) is formed on a second CCL(70) having a second copper foil side(71) which is formed on both sides of a second resin layer(72). A panel plating process for the hole(80) is performed. An external layer(200) is fabricated by forming the second circuit on the second copper foil side(71) of one side of the second CCL(70) oriented to the internal layer(100). A prepreg having a hole is inserted into the bump(60) between the internal layer(100) and the external layer. A stacked structure is formed by heating and pressing the prepreg.
申请公布号 KR20040001406(A) 申请公布日期 2004.01.07
申请号 KR20020036598 申请日期 2002.06.28
申请人 COSMOTECH CO., LTD. 发明人 KIM, TAE WAN;LEE, IN BOK;LEE, IN SU;LEE, SEUNG SEOP
分类号 H05K3/46;(IPC1-7):H05K3/46 主分类号 H05K3/46
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