| 摘要 |
PURPOSE: A method for fabricating a semiconductor device is provided to reduce resistance by broadening the area of a metal silicide layer in contact with a gate, and to control the resistance increased by a low thickness of the gate by forming a metal silicide layer with a broad area while the thickness of the gate is reduced. CONSTITUTION: A gate electrode(23a) is formed in a predetermined region on a semiconductor substrate(21) by interposing a gate insulation layer(22). The first metal silicide layer(27) is formed on the gate electrode. A lightly-doped-drain(LDD) region(28) is formed in the surface of the substrate at both sides of the first metal silicide layer. An insulation layer sidewall(29) is formed on the first metal silicide layer at both sides of the gate electrode. A source/drain impurity region(30) is formed in the surface of the substrate at both sides of the insulation layer spacer. The second metal silicide layer(31) is formed on the source/drain impurity region.
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