发明名称 |
Dram with memory independent burst lengths for reads versus writes |
摘要 |
A method and system that enables independent burst lengths for reads and writes to a DRAM subsystem. Specifically, the method provides a mechanism by which read bursts may be longer than write bursts since there are statistically more reads than writes to the DRAM and only some beats of read data are modified and need to be re-written to memory. In the preferred embodiment, the differences in the burst length is controlled by an architected address tenure, i.e., a set of bits added to the read and write commands that specify the specific number of beats to read and/or write. The bits are set by the processor during generation of the read and write commands and prior to forwarding the commands to the memory controller for execution.
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申请公布号 |
US6675270(B2) |
申请公布日期 |
2004.01.06 |
申请号 |
US20010843060 |
申请日期 |
2001.04.26 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
ARIMILLI RAVI KUMAR;MAULE WARREN EDWARD |
分类号 |
G06F12/00;G06F13/00;G06F13/16;(IPC1-7):G06F13/00 |
主分类号 |
G06F12/00 |
代理机构 |
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