| 摘要 |
A transistor package comprises a first layer in which a thermally conductive flange is integrated into a dielectric substrate layer, a transistor attached to the flange, and input and output contacts coupled to the transistor. The transistor package is attached to a circuit board such that its input and output contacts are electrically coupled to associated conductors on the circuit board. In one embodiment, the transistor package further comprises additional dielectric layers, bonded to the bottom layer, in which a top layer forms a lid covering the transistor. The layers intermediate the bottom and top layers have central areas cut away where the layers overlap the transistor, thereby forming an interior chamber in the package. Impedance matching networks may also be provided to couple the transistor input and output terminals to their respective contacts, where the matching networks tune the input and output impedances of the package. These matching networks may comprise a plurality of components and conductors implemented the intermediate layers and/or the top layer. |
