| 摘要 |
<p>A digital delta-sigma modulator (100) for controlling a multi-modulus divider (34) in a fractional-N frequency synthesizer (10) features cascaded delta-sigma modulator stages (102, 104, 106) in a feed-forward circuit topology to extend the possible multi-modulus control output values between the range of -1 to +1. A direct input receives an N-bit input control word (112) which can be dithered, for example, by a sinewave in a two's complement format. The digital delta-sigma modulator can be of any type and includes cascaded accumulators (114, 134, 154) and pipelined accumulator topologies.</p> |
