| 摘要 |
PURPOSE: A method for manufacturing a semiconductor flash memory cell is provided to be capable of preventing the generation of defect due to the gathering effect of dopants, effectively restraining TED(transient enhanced diffusion) phenomenon of the dopants, and maximizing the activation of the dopants. CONSTITUTION: A tunnel oxide layer(114), a floating gate(116), a dielectric layer(118), a control gate(120), and an anti-reflective coating(124) are sequentially formed at the upper portion of a semiconductor substrate(100). An isolation layer of a common source line formation region, is etched by using a self-aligned source etching process for forming a common source line(132) at the semiconductor substrate. After sequentially implanting the first and second impurities into the common source line formation region, a spike annealing process is carried out at the resultant structure. Then, an ion implantation is carried out at the resultant structure by using the third impurities.
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