METHOD FOR REDUCING EMI AND IR-DROP IN DIGITAL SYNCHRONOUS CIRCUITS
摘要
A method for designing a synchronous digital circuit that exploits clock skew so as to reduce EMI and IR-drop. The circuit has a plurality of storage elements connected to combinational logic blocks, each of the storage elements being driven by a clock signal distributed from a clock device; and the method involves substantially maximizing the clock skew in the circuit subject to one or more constraints on the design of the circuit.
申请公布号
WO03040967(A3)
申请公布日期
2003.12.24
申请号
WO2002EP12266
申请日期
2002.11.04
申请人
TELEFONAKTIEBOLAGET LM ERICSSON (PUBL);SVENSSON, LARS;LINDKVIST, HANS