发明名称 Quadratic programming method for eliminating cell overlap and routing congestion in an IC layout
摘要 To help eliminate overlapping cell placements or to reduce routing congestion in an IC layout wherein cells are integer multiples of a standard size cell unit, the layout is organized into an array of rectangular blocks, each having capacity to accommodate several cell units. A separate equation is established for each block relating a sum of a set of flow variables to an "overflow factor". Each flow variable of the equation for each block corresponds to a separate one of that block's neighboring blocks and represents an estimated number of cell units that must be moved to or received from the corresponding neighboring block to eliminate overlapping cell placements or routing congestion within the block. The overflow factor for each block represents an estimated total number of cell units the block must pass into its neighboring blocks or an estimated maximum number of cell units it may receive from its neighboring blocks in order to eliminate cell overlap or routing congestion in all blocks. A solution to the set of equations is then selected to obtain values of flow variables which, when subsequently used to guide cell relocation, substantially reduces likelihood of cell overlap or routing congestion while substantially minimizing disturbance to the layout.
申请公布号 US6668365(B2) 申请公布日期 2003.12.23
申请号 US20020225255 申请日期 2002.08.20
申请人 CADENCE DESIGN SYSTEMS, INC. 发明人 HARN YWH-PYNG
分类号 G06F17/50;(IPC1-7):G06F17/50;G06F9/45 主分类号 G06F17/50
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