发明名称 Apparatus and method for reassembling frame data into stream data
摘要 The present invention is a method and apparatus for reducing processing overhead using a stream data reassembly mechanism and at least one data buffer. The present invention pre-processes incoming frames before delivering the frames to system memory. When a first packet of an data stream is received, the data from the packet is placed into a data buffer. Information about the first packet is stored in a logical channel descriptor (LCD) to indicate that data exists in the current data buffer. As each subsequent packet in the data stream is received, the reassembly mechanism removes extraneous transmission data from the packet and checks the CRC of each trailer to qualify the data within the packet. After the data is qualified, the reassembly mechanism stores the data portion of the packet in the data buffer. This preprocessing of each packet continues until a predetermined condition is met. Once a predetermined condition is met, the reassembly mechanism will make the contents of the buffer available to the system. The reassembly may optionally associate a direct memory access (DMA) descriptor with the buffer and burst the contents of the buffer into system memory. The reassembly mechanism of the present invention thereby reduces the amount of data reception interrupts processed by the system and can also reduce the number of direct memory access data transfer across the system bus.
申请公布号 US6667978(B1) 申请公布日期 2003.12.23
申请号 US19980112470 申请日期 1998.07.09
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 DELP GARY SCOTT;SLANE ALBERT ALFONSE
分类号 H04L29/06;H04L29/08;(IPC1-7):H04J3/22;H04L12/56 主分类号 H04L29/06
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