发明名称 LOW POWER CYCLIC A/D CONVERTER
摘要 A low power cyclic RSD ADC (20) has a single RSD stage (22) that receives one of an analog input signal and a residual voltage feedback signal and converts the one selected signal to a digital output signal. The RSD stage (22) generates the residue voltage feedback signal. A first switch (32) connects between a converter input terminal (30) and an input of the RSD stage (22) for applying the analog input to the RSD stage. A second switch (52) is connected between an output of the RSD stage (22) and the input of the RSD stage. The RSD stage (22) includes a pair of comparators (34, 36) that predetermins high and low voltages, respectively. A logic circuit (38) generates the digital output signal based on these outputs.
申请公布号 WO03023968(A3) 申请公布日期 2003.12.18
申请号 WO2002US26148 申请日期 2002.08.15
申请人 MOTOROLA, INC. 发明人 GARRITY, DOUGLAS;RAKERS, PATRICK, L.
分类号 H03M1/40 主分类号 H03M1/40
代理机构 代理人
主权项
地址