| 摘要 |
<p>A row addressing circuit and method for addressing multiple rows of a visual display in a single cycle. The circuit comprises: a decoder coupled to a plurality of signal lines, wherein the decoder includes a system for decoding a row select address, a first pre-write address and a second pre-write address and selecting three corresponding signals lines during the single cycle; and wherein each of the plurality of signal lines is further coupled to a dedicated set of latches, wherein each set of latches includes a row select latch, a first pre-write latch, and a second pre-write latch.</p> |
