发明名称 Method and apparatus emulating read only memories with combinatorial logic networks, and methods and apparatus generating read only memory emulator combinatorial logic networks
摘要 The invention includes combinatorial logic networks emulating ROMs (RECLNs) and an emulation method for ROMs, as well as emulating synchronous ROMs with RECLN's coupled to synchronizing interfaces. The invention includes methods and apparatus generating synthesizable RECLN descriptions, as well as, circuit descriptions, netlists, circuit layouts, mask sets, unpackaged integrated circuit wafers, integrated circuits, and systems products using the synthesizable RECLN descriptions and products derived therefrom. The invention also includes method and apparatus for doing business involving generation of synthesizable RECLN descriptions and/or the above mentioned derived products. The invention also includes creating installation mechanisms for synthesizable RECLN generation methods to create systems generating synthesizable RECLN descriptions.
申请公布号 US2003233219(A1) 申请公布日期 2003.12.18
申请号 US20020155502 申请日期 2002.05.23
申请人 LANDERS GEROGE;JENNINGS EARLE WILLIS 发明人 LANDERS GEROGE;JENNINGS EARLE WILLIS
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
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