| 摘要 |
1,196,372. Automatic control of speed. WESTEL ASSOCIATES, WESTEL Inc., and WESTEL CALIFORNIA INVESTORS. [trading as WESTEL CO.], Jan.29 1968 [March 24, 1967], No. 4459/68. Heading G3R. The frequency and phase relationship of two pulse trains F and R is determined by respective comparators 28, 32 whose outputs are selectively connected to a "control signal" terminal 110 by switch means 36 responsive to the frequency comparator. The frequency comparator 28 employs logic circuitry to set and reset flip-flops A, B and C, and the arrangement is such that the output A, which is connected to the switch 36 is normally switched to 1 by an R pulse and to 0 by an F pulse but is held in a "1" state when two R pulses occur in the interval between two F pulses until two F pulses occur in the interval between two R pulses, and similarly is held in a "0" state when these events occur in the reverse order. The phase comparator 32 comprises a ramp generator 94 which is triggered by each R pulse and a capacitor 96 which is connected to the ramp generator when a field effect transistor 98 is gated on by the F pulses applied to diode 100. Thus the charge on the capacitor at any time is that voltage which the ramp reached when the last F pulse occured, and so is a measure of the phase displacement. The output S is also connected to the switch 36, and by means of OR gates 104, 106 and the outputs of flip-flop C either A or S is connected to terminal 110. This arrangement is such that, when F and R occur alternately phase signal voltage S is connected but when two F (or R) pulses occur between two R (or F) pulses then A is connected instead, and this will be "0" or "1" according to whether F is faster than R or vice versa. The signal at 110 is used to control a D.C. motor 10 driving a load 14 (a tape capstan) and an F pulse generator 16 comprising an impulse wheel 20.
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