发明名称 Method of fabricating a drain isolated LDMOS device
摘要 A tank-isolated drain extended power device (50, 60, 70, 80) having an added laterally extending heavily doped p-type region (56, 62, 72) in combination with a p-type Dwell (32) which reduces minority carrier buildup. The p-doped regions are defined in a P-epi layer surrounded by a buried NBL region (14) connected with a deep low resistance drain region (16) forming a guardring. This additional laterally extending p-doped region (56,62,72) reduces minority carrier build up such that recovery time is significantly reduced, and power loss is also significantly reduced due to reduced collection time of the minority carriers. The device may be formed as an LDMOS device.
申请公布号 US2003228737(A1) 申请公布日期 2003.12.11
申请号 US20020167283 申请日期 2002.06.11
申请人 EFLAND TAYLOR R.;TSAI CHIN-YU 发明人 EFLAND TAYLOR R.;TSAI CHIN-YU
分类号 H01L21/761;H01L29/10;H01L29/78;(IPC1-7):H01L21/20 主分类号 H01L21/761
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