发明名称 MULTI-GENERATOR, PARTIAL ARRAY Vt, TRACKING SYSTEM TO IMPROVE ARRAY RETENTION TIME
摘要 <p>Improved transistor array device performance is obtained by use of bias voltage regulation which tracks with a fraction of a monitor transistor threshold voltage. The circuitry and methods are especially useful for improving the performance of transistor array devices such as DRAM and embedded DRAM. These benefits are obtained especially when at least two bias voltages normally supplied to the array are regulated by tracking with a fraction of an actual threshold voltage of at least one monitor transistor. Performance improvements include improved reliability, wider operational bias conditions, reduced power consumption and (in the case of memory cells) improved retention time.</p>
申请公布号 EP1287529(B1) 申请公布日期 2003.12.10
申请号 EP20010939592 申请日期 2001.05.25
申请人 INFINEON TECHNOLOGIES AG;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 ELLIS, WAYNE F.;LI, YUJUN;HSU, LOUIS, L.;WEINFURTNER, OLIVER;JI, BRIAN, L.
分类号 G11C5/14;G11C8/08;G11C11/4074;G11C11/4078;(IPC1-7):G11C5/14 主分类号 G11C5/14
代理机构 代理人
主权项
地址