摘要 |
PROBLEM TO BE SOLVED: To enable a high-speed reading operation through a bus in a logic circuit and to provide a logic verifying method capable of accurately verifying the operation. SOLUTION: A CPU 32 of the semiconductor device 31 is connected to an external memory 36 through the bus 35. The external memory 36 stores a plurality of address specification data D<SB>ax</SB>to D<SB>az</SB>for specifying addresses A<SB>x</SB>to A<SB>z</SB>to be read out next and end data DLAST indicating the end of read processing. The CPU 32 determines the addresses A<SB>x</SB>to A<SB>z</SB>to be read next according to the data D<SB>ax</SB>to D<SB>az</SB>read out of the external memory 36 to reads data stored in the address. This reading operation is repeated and, when the end data DLAST are read out, it is judged that the reading operation is normal. COPYRIGHT: (C)2004,JPO
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